Product Summary

The AT24C512B-PU25 is a two-wire Serial EEPROM with three device address inputs. It provides 524,288 bits of serial electrically erasable and programmable read only memory (EEPROM) organized as 65,536 words of 8 bits each. The AT24C512B-PU25 is cascadable feature allows up to eight devices to share a common two-wire bus. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The AT24C512B-PU25 is available in space-saving 8-pin PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead TSSOP, 8-ball dBGA2 and 8-lead Ultra Thin SAP packages. In addition, the entire family is available in 1.8V (1.8V to 3.6V) and 2.5V (2.5V to 5.5V) versions.

Parametrics

AT24C512B-PU25 absolute maximum ratings: (1)Operating Temperature: 55℃ to +125℃; (2)Storage Temperature: 65℃ to +150℃; (3)Voltage on Any Pin with Respect to Ground: 1.0V to +7.0V; (4)Maximum Operating Voltage: 6.25V; (5)DC Output Current: 5.0 mA.

Features

AT24C512B-PU25 features: (1)Low-voltage and Standard-voltage Operation; (2)1.8v (VCC = 1.8V to 3.6V); (3)2.5v (VCC = 2.5V to 5.5V); (4)Internally Organized 65,536 x 8; (5)Two-wire Serial Interface; (6)Schmitt Triggers, Filtered Inputs for Noise Suppression; (7)Bidirectional Data Transfer Protocol; (8)1 MHz (2.5V, 5.5V), 400 kHz (1.8V) Compatibility; (9)Write Protect Pin for Hardware and Software Data Protection; (10)128-byte Page Write Mode (Partial Page Writes Allowed); (11)Self-timed Write Cycle (5 ms Max); (12)High Reliability; (13)Endurance: 1,000,000 Write Cycles; (14)Data Retention: 40 Years; (15)Lead-free/Halogen-free Devices; (16)8-lead PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead TSSOP, 8-ball dBGA2, and 8-lead Ultra Thin Small Array (SAP) Packages; (17)Die Sales: Wafer Form, Waffle Pack and Bumped Die.

Diagrams

AT24C512B-PU25 block diagram

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